A ferroelectric memory composed of memory cells each including a ferroelectric capacitor is developed as a semiconductor memory which has both advantages of DRAMs and flash memories/EEPROMs. The ferroelectric memory operates the ferroelectric capacitor made of ferroelectric material, which is insulated material, as a variable capacitor. The ferroelectric memory can hold data without a power supply, by utilizing remnant polarization which is left even when no voltage is applied to the ferroelectric capacitor. By using this feature, the ferroelectric memory is used as a storage medium such as an IC card and an RFID tag or the like.
A ferroelectric memory of this type compares a read voltage corresponding to electric charge read from the memory cell with a reference voltage, and determines logic value of data held in the memory cell. For example, the reference voltage is set to an average value of a maximum voltage and a minimum voltage of a plurality of the read voltages read to a plurality of bit lines (see, for example, Japanese Laid-open Patent Publication No. 2002-157876).
Further, a ferroelectric memory called a bit line GND sensing technique has recently been proposed (see, for example, Japanese Laid-open Patent Publication No. 2002-133857). This ferroelectric memory has: a pMOS transistor (charge transfer circuit) whose source is coupled to a bit line; and a charge storage circuit connected to a drain of the pMOS transistor. A gate-to-source voltage of the pMOS transistor is initially set to the same value as a threshold voltage before a plate line is activated. In a read operation, when a voltage is applied to the plate line, the pMOS transistor turns on according to an increase in the voltage of the bit line. Consequently, the electric charge read to the bit line from the memory cell is transferred to the charge storage circuit via the pMOS transistor. Then, a logic value of data held in the memory cell is determined according to an electric charge amount transferred to the charge storage circuit.
Generally, a capacitance value of a ferroelectric capacitor is subject to great fluctuation at the time of manufacture. This fluctuation further causes the fluctuation of read voltages corresponding to high logic level and low logic level and of a reference voltage. Accordingly, a difference between the read voltage and the reference voltage fluctuates, which lowers a read margin.